Price: $32.99
(as of Dec 26, 2024 21:10:13 UTC – Details)
-Specification-
Brand Name: MaixPy
Demo Board Type: FPGA
Memory：128MB DDR3，13Row x 10Col x 8banks x 16bits
Flash：32Mbits NOR Flash，W25Q32JVS
Debugger：Jtag + Uart，JST SH1.0 8Pins connector
SD card slot 1：Push-pull type
Display：8Pins spi lcd connector
Package ：204P DDR3
Avaliable IO：117
RGB Interface：1x RGB565 40P FPC Connector
DVP Interface：1x 24P FPC Connector
Mic array Interface：1x 10P FPC Connector
Touch Interface: 1x 4P FPC Connector
PMOD Interface: 4
3.5mm headphone Jack: 1x LPA4809MSF driver
DIP switch:1x 5P DIP switch
Slide switch: 1x Switch USB function
-Package Content-
1x Sipeed Tang Primer 20K Lite ext-board
1x Sipeed Tang Primer 20K Core Broad
1x RV debugger plus
1x Type-CData Cabble
1x 8P 1.0mm to 2.54mm Terminal wires
-Technical Support-
Please click “WayPonDEV” and ask a question.
Please leave the message monica#smartfire.cn (f——>@) skype: monica_9122.
Please leave the message in our forum by forum.youyeetoo.com/.
👍[High-performance DSP] Sipeed Tang Primer 20K Core Module board is sodimm package,uses GW2A-LV18PG256C8I7 as the main chip, and hasmultiple internal resources, such as high-performance DSP,high-speed LvDs interface and BSRAM resources, on-boardDDR3 and PMIC. Users could use this CM board for rapiddevelopment and verify, and it’s suitable for high-speedand low-cost situations.
👍[Run RISC-V Code] Users can burn the hardware code bitstream file ofPicoRV/Litex to Gw2A, and then use GW2A as acommon MCU. lt can run RISC-V code, conduct RISC-v soft core experiments
👍[Verilog Design] Users use Verilog to design custom hardware func-tions on the basic of PicoRV/Litex lP core, and at thesame time use C language to write code running onPicoRV/Litex core.
👍[Rich Peripheral interfaces]Sipeed Tang Primer 20K Dock is equipped with a wealth of pe-ripheral resources, such as onboard USB-JTAG & UARTperipheral , Ethernet PHY and RJ45 connector, USB2.0PHY，HDMIl output connector,Audio output circuit and3.5mm connector，RGB screen connector,DVP cameraconnector.
👍[PMOD interfaces] Sipeed Tang Primer 20K Lite ext-board routes so many lOs todouble row pin headers and PMOD interfaces, with whichusers could easily connect other peripheral modules or cir-cuits for secondary development.
👍[Minimalist IDE] Comapred with other FPGA IDE, the lDE which is used to develop Tang Primer 20K is really small, the hard disk capacity occupied after installation does not exceed 1G.
